The present invention relates to a video decoder design and a video encoder design, and more particularly, to a partial decoding circuit in a video encoder/decoder for dealing with inverse second transform and a partial encoding circuit of a video encoder for dealing with second transform.
The conventional video coding standards generally adopt a block based coding technique to exploit spatial and temporal redundancy. For example, the basic approach is to divide the whole source frame into a plurality of blocks, perform prediction on each block, transform residuals of each block, and perform quantization, scan and entropy encoding. Besides, a reconstructed frame is generated in an internal decoding loop of the video encoder to provide reference pixel data used for coding following blocks. For example, inverse scan, inverse quantization, and inverse transform may be included in the internal decoding loop of the video encoder to recover residuals of each block that will be added to predicted samples of each block for generating a reconstructed frame. The functions of the internal decoding loop of the video encoder are also implemented in a video decoder for recovering residuals of each block and generating a reconstructed frame.
For certain video coding standards, a multi-stage inverse transform that sequentially performs an inverse second transform and a typical inverse transform may be implemented in a video encoder/decoder, and a multi-stage transform that sequentially performs a typical transform and a second transform may be implemented in a video encoder. There is a need for an innovative inverse residual transform design with low cost and/or high performance and an innovative residual transform design with low cost and/or high performance for dealing with the inverse second transform and the second transform, respectively.